RL (IY+d)

Operation

n---------------------m
| n--m  n----------m  |
v-|CY|<-|7<-------0|<-u
  v--u  v----------u
           (IY+d)

Mnemonic

RL

Operands

(IY+d)

b7b6b5b4b3b2b1b0
1 1 1 1 1 1 0 1$FD
1 1 0 0 1 0 1 1$CB
d
0 0 0 1 0 1 1 0$16

Description

The contents of the memory address specified by the sum of the contents of Index Register IY and the two's-complement displacement integer, d, are rotated left 1 bit position. The contents of bit 7 are copied to the Carry flag, and the previous contents of the Carry flag are copied to bit 0.

Condition Bits Affected

Sis set if result is negative, otherwise it is reset.
Zis set if result is 0, otherwise it is reset.
His reset.
P/Vis set if parity even, otherwise it is reset
Nis reset.
Cis data from bit 7 of source register.

Example

Index Register IY contains $1000 and the contents of memory location $1002 are:

C76543210
010001111

Upon the execution of

	RL	(IY+$2)

memory location $1002 and the Carry flag now contain:

C76543210
100011110