n----------m n--m n-|7------->0|->|CY| | v^---------u v--u | | (HL) v--u
SRA
(HL)
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | |
|---|---|---|---|---|---|---|---|---|
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | $CB |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | $2E |
An arithmetic shift right 1 bit position is performed on the contents of the memory address specified by the contents of the register pair HL. The contents of bit 0 are copied to the Carry flag and the previous contents of bit 7 remain unchanged.
| S | is set if result is negative, otherwise it is reset. |
| Z | is set if result is 0, otherwise it is reset. |
| H | is reset. |
| P/V | is set if parity even, otherwise it is reset |
| N | is reset. |
| C | is data from bit 0. |
The HL register pair contains $2828 and the contents of memory location $2828 are:
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|
| 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 |
Upon the execution of
SRA (HL)
memory location $2828 and the Carry flag now contain:
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | C | |
|---|---|---|---|---|---|---|---|---|---|
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 |