The NC100 I/O Ports

You will not often need to make use of the Input/Output ports on the Notepad, but all the details you need are here for when you do, including mapping the video RAM into the core 64K of RAM, determining the battery and memory card status, communications configuration and so on.

The display memory for the 8-line NC computers consists of a block of 4096 bytes where the first byte defines the state of the pixels in the top left-hand corner of the screen.
A 1 bit set means the pixel is set to black. The first byte controls the first eight dots with bit 7 controlling the bit on the left. The next 59 bytes complete the first raster line of 480 dots.
The bytes which define the second raster line start at byte 64 to make the hardware simpbler so bytes 60, 61, 62 and 63 are wasted. There are then another 64 bytes (with the last four unused) which define the second raster line and so on straight down the screen.

So the layout is like this:

               BYTE 00     BYTE 01     BYTE 02
Bit no.        76543210    76543210    76543210
Pixel No.      00000000    00111111    11112222
               01234567    89012345    67890123
Character No.  0-----0-    ----0---    --0-----
(for 1 row)    0-----1-    ----2---    --3-----

This continues on for subsequent lines. For example, the second line is the range of bytes 64-127, and line three is 128-191, and so on. You may also have noticed that displayed characters are only six pixels wide, so slightly unusual routines are required to read and write them, although you can use the Jump Block calls to do this for you.

These addresses control the NC100's bank switch capabilites. Writers of external applications will most likely use them for accessing the display RAM for direct screen reading and writing. Port:

&10		controls 0000-3FFF
&11		controls 4000-7FFF
&12		controls 8000-BFFF
&13		controls C000-FFFF

On reset all are set to 0. For each address the byte written has the following meaning:

If neither bit 6 or bit 7 are set, then ROM is selected. Therefore:

So, for example, if you want to switch the third 16K of internal RAM so the processor sees it at &4000-&7FFF you would output the value &42 to I/O address &11.
&42 has bits 6 set to 1 and bit 7 to 0, while bits 0-6 are 00010b which is the third 16K of internal RAM.

Therefor, to switch the screen (which is the fourth 16K of internal RAM) into the fourth 16K of mapped RAM so that the processor sees it between &C000 and &FFFF, you would output the value &43 (67 decimal) to port &13.

Here is a broad overview of the NC100's layout and the values required to map each 16K block in to one of the four areas of memory:

bit 7 = 1 for wait states, 0 for no wait
On reset this is set to 1. The bit should be set if the card RAM/ROM is 200nS or slower.

On reset all data is set to 1. If programmig the UART directly ensure that TxD clock is operating x16

The byte written here is latched into the parallel port output register. To print it you must then take the Strobe signal (I/O address 30 bit 6) low and then high again. If the printer sends ACK this may generate an IRQ if the mask bit is set in I/O address 60 - IRQ mask.

On reset all data is set to &FF. The top bit in the high byte (&51 and &53) switches the respective sound generator on or off: 1=off, 0=on. The frequency generated is determined as:

Frequency = 307,200
            -------
             data

So if the data word programmed into &50 and &51 was &7800 (that is, &50=0, &51=78) then the frequency generated would be:

Frequency = 307,200 = 307,200 = 10Hz
            -------   -------
             &7800     30,720

On reset all bit are 0. for each bit: 1=allow that interrupt source to produce IRQs, 0=interrupt source is masked.

When an interrupt occurs this port should be read to determine its source. The bit will be set to 0 to identify the interrupting device. The interrupt can then be cleared by writing 0 to that bit.

Each key of the 64 on the keyboard will set a bit in one of these bytes while pressed.

The gate array scans the keyboard every 10mS and then generates an interrupt. The program should then read these 10 I/O locations to etermine which key has been pushed. When I/O address &B9 is read the key scan interrupt is cleard automatically and the next scan cycle will start from &B0.

The UART is the NEC uPD71051. Programmers are advised to study the data sheep for that chip for more information. The Serial interface requires that the uPD4711 line driver hip be turned on by writing a 0 to bit 4 of I/O address &30. While turned on, power consumption increases so this should only be done when necessary. Calling PADINITSERIAL (&B85A) first will ensure no bytes are lost when writing.

See the chip data sheet for more information.