HL <- HL + ss + CY
ADC
HL,ss
b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | |
---|---|---|---|---|---|---|---|---|
1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | $ED |
0 | 1 | ss | 1 | 0 | 1 | 0 |
The contents of register pair ss (any of register pairs BC, DE, HL, or SP) are added with the Carry flag (C flag in the F Register) to the contents of register pair HL, and the result is stored in HL. In the assembled object code, operand ss is specified as follows:
Register Pair | r | Hex |
---|---|---|
BC | 00 | $4A |
DE | 01 | $5A |
HL | 10 | $6A |
SP | 11 | $7A |
S | is set if result is negative, otherwise it is reset. |
Z | is set if result is 0, otherwise it is reset. |
H | is set if carry from bit 11, otherwise it is reset. |
P/V | is set if overflow, otherise it is reset. |
N | is reset. |
C | is set if carry from bit 15, otherwise it is reset. |
If register pair BC contains $2222, register pair HL contains $5437, and the Carry Flag is set, then upon the execution of
ADC HL,BC
the HL register pair contains $765A.