A - (HL), HL <- HL-1, BC <- BC-1
CPD
None
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | |
|---|---|---|---|---|---|---|---|---|
| 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | $ED |
| 1 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | $A9 |
The contents of the memory location addressed by the HL register pair is compared with the contents of the Accumulator. During a compare operation, a condition bit is set. The HL and Byte Counter (register pair BC) are decremented.
| S | is set if result is negative, otherwise it is reset. |
| Z | is set if A equal (HL), otherwise it is reset. |
| H | is set if borrow from bit 4, otherwise it is reset. |
| P/V | is set if BC-1 != 0, otherwise it is reset |
| N | is set. |
| C | is not affected. |
If the HL register pair contains $1111, memory location $1111 contains $3B, the Accumulator contains $3B, and the Byte Counter contains $0001. Upon the execution of
CPD
the Byte Counter contains $0000, the HL register pair contains $1110, the flag in the F Register is set, and the P/V flag in the F Register is reset. There is no effect on the contents of the Accumulator or address $1111.