CPI

Operation

A - (HL), HL <- HL+1, BC <- BC-1

Mnemonic

CPI

Operands

None

b7b6b5b4b3b2b1b0
1 1 1 0 1 1 0 1$ED
1 0 1 0 0 0 0 1$A1

Description

The contents of the memory location addressed by the HL register is compared with the contents of the Accumulator. With a true compare, a condition bit is set. Then HL is incre- mented and the Byte Counter (register pair BC) is decremented.

Condition Bits Affected

Sis set if result is negative, otherwise it is reset
Zis set if A is (HL), otherwise it is reset
His set if borrow from bit 4, otherwise it is reset.
P/Vis set if BC-1 is not 0, otherwise it is reset.
Nis set.
Cis not affected.

Example

If the HL register pair contains $1111, memory location $1111 contains $3B, the Accumulator contains $3B, and the Byte Counter contains $0001. Upon the execution of

	CPI

the Byte Counter contains $0000, the HL register pair contains $1112, the Z flag in the F register is set, and the P/V flag in the F Register is reset. There is no effect on the contents of the Accumulator or to address $1111.