@
DAA
None
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | |
|---|---|---|---|---|---|---|---|---|
| 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | $27 |
This instruction conditionally adjusts the Accumulator for BCD addition and subtraction operations. For addition (ADD, ADC, INC) or subtraction (SUB, SBC, DEC, NEG), the following table indicates the operation being performed:
| Operation | C before DAA | Hex in upper digit (bits 7-4) | H before DAA | Hex in lower digit (bits 3-0) | Number added to byte | C after DAA |
|---|---|---|---|---|---|---|
| 0 | 9-0 | 0 | 0-9 | 00 | 0 | |
| 0 | 0-8 | 0 | A-F | 06 | 0 | |
| 0 | 0-9 | 1 | 0-3 | 06 | 0 | |
| ADD | 0 | A-F | 0 | 0-9 | 60 | 1 |
| ADC | 0 | 9-F | 0 | A-F | 66 | 1 |
| INC | 0 | A-F | 1 | 0-3 | 66 | 1 |
| 1 | 0-2 | 0 | 0-9 | 60 | 1 | |
| 1 | 0-2 | 0 | A-F | 66 | 1 | |
| 1 | 0-3 | 1 | 0-3 | 66 | 1 | |
| SUB | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
| SBC | 0 | 0-8 | 1 | 6-F | FA | 0 |
| DEC | 1 | 7-F | 0 | 0-9 | A0 | 1 |
| NEG | 1 | 6-7 | 1 | 6-F | 9A | 1 |
| S | is set if most-significant bit of the Accumulator is 1 after an operation, otherwise it is reset. |
| Z | is set if the Accumulator is 1 after an operation, otherwise it is reset. |
| H | see the DAA instruction table above. |
| P/V | is set if the Accumulator is at even parity after an operation, otherwise it is reset. |
| N | is not affected. |
| C | see the DAA instruction table above. |
An addition operation is performed between 15 (BCD) and 27 (BCD); simple decimal arithmetic provides the following result:
| 15 |
| +27 |
| ---- |
| 42 |
The binary representations are added in the Accumulator according to standard binary arithmetic, as follows:
| 0001 | 0101 | |||
| + 0010 | 0111 | |||
| ------- | ------- | |||
| 0011 | 1100 | = 3C |
The sum is ambiguous. The DAA instruction adjusts this result so that the correct BCD representation is obtained, as follows:
| 0011 | 1100 | |||
| + 0000 | 0110 | |||
| ------- | ------- | |||
| 0100 | 0010 | = 42 |