DEC ss

Operation

ss <- ss - 1

Mnemonic

DEC

Operands

b7	b6	b5	b4	b3	b2	b1	b0

0	0	ss		1	0	1	1

Description

The contents of register pair ss (any of the register pairs BC, DE, HL, or SP) are decremented. In the assembled object code, operand ss is specified as follows:

Register Pair	r	Hex
BC	00	$0B
DE	01	$1B
HL	10	$2B
SP	11	$3B

Condition Bits Affected

None

Example

If register pair HL contains $1001, then upon the execution of

	DEC	HL

the HL register pair contains $1000.