IF cc true, PC <- nn
JP
cc,nn
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |
|---|---|---|---|---|---|---|---|
| 1 | 1 | cc | 0 | 1 | 0 | ||
| n | |||||||
| n | |||||||
Note: The first operand in this assembled object code is the low-order byte of a two-byte address.
If condition cc is true, the instruction loads operand nn to register pair Program Counter (PC), and the program continues with the instruction beginning at address nn. If condition cc is false, the Program Counter is incremented as usual, and the program continues with the next sequential instruction. Condition cc is programmed as one of eight statuses that correspond to condition bits in the Flag Register (Register F). These eight statuses are defined in the following table, which specifies the corresponding cc bit fields in the assembled object code.
| cc | Hex | Condition | Relevant Flag |
|---|---|---|---|
| 000 | $C2 | Non-Zero (NZ) | Z |
| 001 | $CA | Zero (Z) | Z |
| 010 | $D2 | No Carry (NC) | C |
| 011 | $DA | Carry (C) | C |
| 100 | $E2 | Parity Odd (PO) | P/V |
| 101 | $EA | Parity Even (PE) | P/V |
| 110 | $F2 | Sign Positive (P) | S |
| 111 | $FA | Sign Negative (M) | S |
None
If the Carry flag (i.e., the C flag in F Register) is set and address $1520 contains $03, then upon the execution of
JP C,$1520
the Program Counter contains $1520 and, on the next machine cycle, the CPU fetches byte $03 from address $1520.