LD A,I

Operation

A <- I

Mnemonic

LD

Operands

A,I

b7b6b5b4b3b2b1b0
1 1 1 0 1 1 0 1$ED
0 1 0 1 0 1 1 1$57

Description

The contents of the Interrupt Vector Register I are loaded to the Accumulator

Condition Bits Affected

Sis set if the I Register is negative, otherwise it is reset
Zis set if the I Register is 0, otherwise it is reset
P/Vcontains contents of IFF2
NN is reset
Cis not affected

If an interrupt occurs during execution of this instruction, the Parity flag contains a 0.