LD HL,(nn)

Operation

H <- (nn+1), L <- (nn)

Mnemonic

LD

Operands

HL,(nn)

b7b6b5b4b3b2b1b0
0 0 1 0 1 0 1 0$2A
n
n

Description

The contents of memory address (nn) are loaded to the low-order portion of register pair HL (Register L), and the contents of the next highest memory address (nn + 1) are loaded to the high-order portion of HL (Register H). The first n operand after the op code is the low-order byte of nn.

Condition Bits Affected

None

Example

If addresss $4545 contains $37 and address $4546 contains $A1, then upon execution of

	LD	HL,($4545)

the HL register pair contains $A137.