(nn+1) <- H, (nn) <- L
LD
(nn),HL
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | |
|---|---|---|---|---|---|---|---|---|
| 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | $22 |
| n | ||||||||
| n | ||||||||
The contents of the low-order portion of register pair HL (Register L) are loaded to memory address (nn), and the contents of the high-order portion of HL (Register H) are loaded to the next highest memory address (nn + 1). The first n operand after the op code is the low-order byte of nn.
None
If register pair HL contains $483A, then upon execution of
LD ($B299),HL
address $B229 contains $3A and address $B22A contains $48.