(C) <- (HL), B <- B-1, HL <- HL-1





1 1 1 0 1 1 0 1$ED
1 0 1 0 1 0 1 1$AB


The contents of the HL register pair are placed on the address bus to select a location in memory. The byte contained in this memory location is temporarily stored in the CPU. Then, after the byte counter (B) is decremented, the contents of Register C are placed on the bottom half (A0 through A7) of the address bus to select the I/O device at one of 256 possible ports. Register B can be used as a byte counter, and its decremented value is placed on the top half (A8 through A15) of the address bus at this time. Next, the byte to be output is placed on the data bus and written to the selected peripheral device. Finally, the register pair HL is decremented.

Condition Bits Affected

Sis unknown
Zis set if B-1=0, otherwise it is reset.
His unknown
P/Vis unknown
Nis set.
Cis not affected.


If Register C contains $07, Register B contains $10, the HL register pair contains $1000, and memory location $1000 contains $59, then upon the execution of


Register B contains $0F, the HL register pair contains $0FFF, and byte $59h is written to the peripheral device mapped to I/O port address $07.