RES b,r

Operation

rb <- 0

Mnemonic

RES

Operands

b,r

b7b6b5b4b3b2b1b0
1 1 0 0 1 0 1 1$CB
1 0 br

Description

Bit b in register r (any of registers B, C, D, E, H, L, or A) is reset. In the assembled object code, operands b and r are specified as follows:

Bit TestedbRegrHexRegrHexRegrHexRegrHexRegrHexRegrHexRegrHex
0000A111$87B000$80C001$81D010$82E011$83H100$84L101$85
1001A111$8FB000$88C001$89D010$8AE011$8BH100$8CL101$8D
2010A111$97B000$90C001$91D010$92E011$93H100$94L101$95
3011A111$9FB000$98C001$99D010$9AE011$9BH100$9CL101$9D
4100A111$A7B000$A0C001$A1D010$A2E011$A3H100$A4L101$A5
5101A111$AFB000$A8C001$A9D010$AAE011$ABH100$ACL101$AD
6110A111$B7B000$B0C001$B1D010$B2E011$B3H100$B4L101$B5
7111A111$BFB000$B8C001$B9D010$BAE011$BBH100$BCL101$BD

Condition Bits Affected

None

Example

Upon the execution of

	RES	4,A

bit 4 in Register A is reset. Bit 0 is the least- significant bit.