RET cc


IF cc true, PCl <- (SP), PCh <- (SP+1)





1 1 cc 0 0 0


If condition cc is true, the byte at the memory location specified by the contents of the Stack Pointer (SP) Register pair is moved to the low-order eight bits of the Program Counter (PC). The SP is incremented and the byte at the memory location specified by the new contents of the SP are moved to the high-order eight bits of the PC. The SP is incremented again. The next op code following this instruction is fetched from the memory location specified by the PC. This instruction is normally used to return to the main line program at the completion of a routine entered by a CALL instruction. If condition cc is false, the PC is simply incremented as usual, and the program continues with the next sequential instruction. Condition cc is programmed as one of eight status that correspond to condition bits in the Flag Register (Register F). These eight status are defined in the following table, which also specifies the corresponding cc bit fields in the assembled object code.

000$C0Non-Zero (NZ)Z
001$C8Zero (Z)Z
010$D0No Carry (NC)C
011$D8Carry (C)C
100$E0Parity Odd (PO)P/V
101$E8Parity Even (PE)P/V
110$F0Sign Positive (P)S
111$F8Sign Negative (M)S

Condition Bits Affected



The S flag in the F Register is set, the Program Counter contains $3535, the Stack Pointer contains $2000, memory location $2000 contains $B5, and memory location $2001 contains $18. Upon the execution of


the Stack Pointer contains $2002 and the Program Counter contains $18B5, thereby pointing to the address of the next program op code to be fetched.