n-----------m
| |
n----Y-T--m n----Y-o--m
A |7 4|3 0| |7 4|3 0| (HL)
v----T--^-u v-Y^-T--Y-u
| || |
v-----uv----u
RLD
None
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | |
|---|---|---|---|---|---|---|---|---|
| 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | $ED |
| 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | $6F |
The contents of the low-order four bits (bits 3, 2, 1, and 0) of the memory location (HL) are copied to the high-order four bits (7, 6, 5, and 4) of that same memory location; the previous contents of those high-order four bits are copied to the low-order four bits of the Accumulator (Register A); and the previous contents of the low-order four bits of the Accumulator are copied to the low-order four bits of memory location (HL). The contents of the high-order bits of the Accumulator are unaffected.
Note: (HL) refers to the memory location specified by the contents of the HL register pair.
| S | is set if the Accumulator is negative after an operation, otherwise, it is reset. |
| Z | Z is set if the Accumulator is 0 after an operation, otherwise it is reset. |
| H | is reset. |
| P/V | is set if the parity of the Accumulator is even after an operation, otherwise it is reset. |
| N | is reset. |
| C | is not affected. |
The HL register pair contains 5000h and the Accumulator and memory location 5000h contain the following data.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
|---|---|---|---|---|---|---|---|---|
| 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | Accumulator |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
|---|---|---|---|---|---|---|---|---|
| 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | ($5000) |
Upon the execution of
RLD
the Accumulator and memory location $5000 now contain:
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
|---|---|---|---|---|---|---|---|---|
| 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | Accumulator |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
|---|---|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0 | ($5000) |