n--m n----------m |CY|<-|7<-------0|<-- 0 v--u v----------u (HL)
SLL
(HL)
b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | |
---|---|---|---|---|---|---|---|---|
1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | $CB |
0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | $36 |
An arithmetic shift left 1 bit position is performed on the contents of the memory address specified by the contents of the register pair HL. Bit 0 is set and the contents of bit 7 are copied to the carry flag.
S | is set if result is negative, otherwise it is reset. |
Z | is set if result is 0, otherwise it is reset. |
H | is reset. |
P/V | is set if parity even, otherwise it is reset |
N | is reset. |
C | is data from bit 7. |
The HL register pair contains $2828 and the contents of memory location $2828 are:
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|
1 | 0 | 1 | 1 | 0 | 0 | 0 | 1 |
Upon the execution of
SLL (HL)
memory location $2828 and the Carry flag now contain:
C | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
---|---|---|---|---|---|---|---|---|---|
1 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |