n--m n----------m
|CY|<-|7<-------0|<-- 0
v--u v----------u
(IY+d)
SLL
(IY+d)
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | |
|---|---|---|---|---|---|---|---|---|
| 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | $FD |
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | $CB |
| d | ||||||||
| 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | $36 |
An arithmetic shift left 1 bit position is performed on the contents of the memory address specified by the sum of the contents of Index Register IY and the two's-complement displacement integer, d. Bit 0 is set and the contents of bit 7 are copied to the carry flag.
| S | is set if result is negative, otherwise it is reset. |
| Z | is set if result is 0, otherwise it is reset. |
| H | is reset. |
| P/V | is set if parity even, otherwise it is reset |
| N | is reset. |
| C | is data from bit 7. |
Index Register IY contains $1000 and the contents of memory location $1002 are:
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|
| 1 | 0 | 1 | 1 | 0 | 0 | 0 | 1 |
Upon the execution of
SLL (IY+$2)
memory location $1002 and the Carry flag now contain:
| C | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
|---|---|---|---|---|---|---|---|---|---|
| 1 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |