SRA (IX+d)

Operation

  n----------m  n--m
n-|7------->0|->|CY|
| v^---------u  v--u
|  | (IX+d)
v--u

Mnemonic

SRA

Operands

(IX+d)

b7b6b5b4b3b2b1b0
1 1 0 1 1 1 0 1$DD
1 1 0 0 1 0 1 1$CB
d
0 0 1 0 1 1 1 0$2E

Description

An arithmetic shift right 1 bit position is performed on the contents of the memory address specified by the sum of the contents of Index Register IX and the two's-complement displacement integer, d. The contents of bit 0 are copied to the Carry flag and the previous contents of bit 7 remain unchanged.

Condition Bits Affected

Sis set if result is negative, otherwise it is reset.
Zis set if result is 0, otherwise it is reset.
His reset.
P/Vis set if parity even, otherwise it is reset
Nis reset.
Cis data from bit 0.

Example

Index Register IX contains $1000 and the contents of memory location $1022 are:

76543210
10111000

Upon the execution of

	SRA	(IX+$22)

memory location $1022 and the Carry flag now contain:

76543210C
110111000