SRA r

Operation

  n---------m  n--m
n-|7------>0|->|CY|
| v^--------u  v--u
|  |   r
v--u

Mnemonic

SRA

Operands

r

b7b6b5b4b3b2b1b0
1 1 0 0 1 0 1 1$CB
0 0 1 0 1 r

Description

An arithmetic shift right 1 bit position is performed on the contents of register r. The contents of bit 0 are copied to the Carry flag and the previous contents of bit 7 remain unchanged. Bit 0 is the least-significant bit. In the assembled object code, operand r is specified as follows:

RegisterrHex
A111$2F
B000$28
C001$29
D010$2A
E011$2B
H100$2C
L101$2D

Condition Bits Affected

Sis set if result is negative, otherwise it is reset.
Zis set if result is 0, otherwise it is reset.
His reset.
P/Vis set if parity even, otherwise it is reset
Nis reset.
Cis data from bit 0.

Example

Register E contains the following data:

76543210
10111000

Upon the execution of

	SRA	E

register E and the Carry Flag now contain:

76543210C
110111000