n---------m n--m
0 -->|7------>0|->|CY|
v---------u v--u
r
SRL
r
| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 | |
|---|---|---|---|---|---|---|---|---|
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | $CB |
| 0 | 0 | 1 | 1 | 1 | r | |||
The contents of register r are shifted right 1 bit posistion. The contents of bit 0 are copied to the Carry flag, and bit 7 is reset. Bit 0 is the least-significant bit. In the assembled object code, operand r is specified as follows:
| Register | r | Hex |
|---|---|---|
| A | 111 | $3F |
| B | 000 | $38 |
| C | 001 | $39 |
| D | 010 | $3A |
| E | 011 | $3B |
| H | 100 | $3C |
| L | 101 | $3D |
| S | is set reset. |
| Z | is set if result is 0, otherwise it is reset. |
| H | is reset. |
| P/V | is set if parity even, otherwise it is reset |
| N | is reset. |
| C | is data from bit 0. |
Register D contains the following data:
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|
| 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 |
Upon the execution of
SRL D
register D and the Carry Flag now contain:
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | C | |
|---|---|---|---|---|---|---|---|---|---|
| 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 |